Digital Mapping of a Realistic Spike Timing Plasticity Model for Real-time Neural Simulations
نویسندگان
چکیده
We develop the major steps taken to map a realistic spike timing-dependent plasticity (STDP) model into digital hardware architecture. Several types of mappings are implemented and tested on FPGA device. We compare their applicability to a real-time spiking neural network (SNN) simulator running in biological time-scale. Keywords—Spiking neural network, STDP, realistic models, real-time processing, FPGA, ASIC
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